Designers of ac-dc power supplies employ trimming potentiometers to calibrate for differential and common mode errors. These need to be trimmed manually by an operator at production to remove offsets and gain inaccuracies. Such errors are introduced by problems in components, including the current-sense resistor and op amps.

Trimming is an expensive, time-consuming process, which can still leave inaccuracies at the end of the procedure. Problems can also occur in the field when mechanical stress causes the trimming pots' values to change.

New controller ICs are able to perform this trim and calibration by programming over the SMBus. A software calibration routine and interface hardware has been developed to automate this procedure.

The article will also demonstrate how the ADM1041 can also be setup for its system monitoring functions, such as overcurrent protection (OCP) and fault monitoring. Figure 1 shows the block diagram of the calibration setup.

COMMON-MODE TRIM
Common-mode trim is necessary when employing high-side current sensing with a sense resistor, and where current-sense amplifiers are used. It's required so that the share-bus voltage is only a function of the load current, and remains independent of load voltage variations.

The issue of current-sense trim is critical to a power supply. The requirement for accuracy is highlighted by the fact that the system may have to trim errors of up to 40mV in a 10mV signal. Trimming in the correct order is also critical. The common-mode trim must be performed first to eliminate errors for the differential trim required for the share bus.

High-side current sensing requires a resistor-divider network to normalise the voltage at the current-sense amplifier inputs. The trim removes errors in the external resistor divider network and in the internal current sense amplifiers. Figure 2 illustrates an ideal resistor-divider network.

Consider the effect if one of the resistors in Figure 2 was incorrect by 1% due to tolerance. In the example, this corresponds to 10% inaccuracy at the share-bus output (Fig. 3). A large error exists on the output because the input signal is gained up by a factor of 100, so that it's useful at the output. Therefore, any error present may also be gained up by this factor.

The ADM1041 allows the polarity of the slope trim to be changed to deal with this issue. The input amplifiers can also have inaccuracies associated with them. To trim for this, the ADM1041 allows the common-mode offset and slope to be varied individually, with separate registers for each. It also enables the output voltage to be varied by programming another register. Varying the output voltage using the ADM1041 registers allows the user to simulate the maximum common-mode swing that can possibly appear in the power.

The output is enabled and no load current is applied during the common-mode trim. Some offset is introduced temporarily, and will be removed at the end of the calibration. The software changes the output voltage by programming the ADM1041 to simulate a common-mode change. The max and min output voltages are recorded by the ADC, and fed back to the software. From this, the software can determine the slope's polarity. The common-mode slope register is then programmed by a known (say 100 LSB) amount. The min and max voltages are again recorded. From these measurements, the software can calculate the correct amount of slope needed to remove the common-mode error (Fig. 4).

The steps to trim the common mode are as follows:

1. Turn on the power-supply output, with no load current.
2. Program Reg 15h to some offset, say C0h. This moves V_SHARE away from ground.
3. Program Reg 19h so that V_OUT =V_MAX. Read V_SHARE voltage. Result = A.
4. Program Reg 19h so that V_OUT =V_MIN. Read V_SHARE voltage. Result = B.
5. If A > B, then program Reg 16h polarity one way.
6. X = A-B.
7. Increase Reg 14h by 100bits (Program Reg14h = 64h) to introduce offset temporarily.
8. Program Reg 19h so that V_OUT =V_MAX. Read V_SHARE voltage. Result = C.
9. Program Reg 19h so that V_OUT =V_MIN. Read V_SHARE voltage. Result = D.
10. Y = C-D.
11. X should be greater than Y. If not, then the Reg16h polarity set was incorrect.
12. Increasing Reg14h by 100 steps reduced the error from (A to B) to (C to D).
13. Calculate how much change is induced by one bit change in Reg14h. Result = 1STEP.
14. #_OF_STEPS = (A-B)/1STEP.
15. Program Reg 14h to #_OF_STEPS
16. Common Mode is now calibrated. Program Reg15h to 00h. This removes the offset introduced earlier.
17. To verify the common mode is calibrated:
18. Program Reg 19h so that V_OUT= V_MAX. Read V_SHARE voltage. Result = E.
19. Program Reg 19h so that V_OUT=V_MIN. Read V_SHARE voltage. Result = F.
20. 2E-F should be = 0.