Paul Double explains why EDA tool expenditures should not steal budget from analogue designer salaries.

Over the past few years, demand for mixed-signal IC products has climbed dramatically: A recent Fabless Semiconductor Association survey shows that over 40% of the wafers ordered by its members are for mixed-signal design. Despite the growing demand for analogue and mixed-signal devices, semiconductor companies constantly feel the pressure to keep design costs down in order to remain competitive.

Mask fabrication, EDA tools, and design engineers are the major three contributors to overall design cost. Unfortunately, mask-fabrication cost remains high in a market with a very limited number of suppliers. Therefore, semiconductor companies are left with two areas where cost savings can be made—either with the EDA tools or the design engineers themselves.

Digital design engineers have benefited significantly from the automation offered by the EDA tools. Thanks to top-down, synthesis-driven techniques, the design of millions-of-transistors digital chips is achievable with fewer design engineers. EDA tools such as Design Compiler from Synopsys and Cadence's Silicon Ensemble are expensive but are crucial to the digital design flow.

The level of abstraction made possible through Hardware Description Languages (HDLs) also has made highly integrated IC design possible without relying on thousands of digital design engineers (Fig. 1).

The situation is different in analogue design, though. Unlike digital design, it's rare that you can design a reusable algorithm for an analogue application that can be used in different circuit types, as well as for design automation. In analogue design, the skill lies in choosing the right topology for the circuit. This choice depends heavily on the application.

Although the number of transistors in analogue design often is small, the design is still very challenging because it requires detailed understanding of the relationship between on-chip transistors and passive devices. Hence, EDA tools support analogue design engineers but don't replace them. Because a high degree of automation isn't offered in analogue design, effective analogue design tools needn't be expensive.

Big EDA players are proposing unified databases for the different design levels that might hold an advantage. However, it could also cause designers to focus on insignificant issues in the interface between the analogue and digital cores.

Unfortunately, it seems that a full-chip extraction on the GDSII mask level will always be needed to capture parasitics in a design. Some EDA vendors advocate full-chip simulation. Although simulating the whole chip might be useful, it only gives a thumbs-up or thumbs-down. It's handy as a final sanity check, but it won't improve the overall design cycle.