Is SoC technology passing by DSPs? Steve Leibson explains why he thinks that's the case.

The movie "Goodbye, Mr. Chips" tracks British schoolteacher Charles Edward ("Chips") Chipping's career from his early professional days, teaching the classics at fictitious Brookfield school, to his old age. Predictably, at the end of the movie, "Chips" passes on after a life well lived. Like Mr. Chips, digital signal processors (DSPs) have already entered their old age, at least as on-chip processor cores. They've served the industry well, but SoC technology has passed them by.

Digital signal processing is now mainstream technology, so it seems heretical to be declaring the end of the road for DSP cores. All sorts of media processing—ranging from voice to music, to still images, to video—require DSP functions.

DSPs first appeared as chips in the early 1980s because general-purpose processors of the day could not deliver sufficient performance for the signal-processing tasks of the day. Early DSP architectures were shaped by the signal-processing algorithms they were created to run and every feature in a DSP accelerates some computation in a signal-processing algorithm.

MAC attack

Early general-purpose processors lacked hardware multipliers, which consumed a relatively large number of gates for the time. Yet signal-processing algorithms such as finite- and infinite-impulse-response (FIR and IIR) filtering are full of multiplications followed by accumulation of the multiplication products. As a result, DSPs have incorporated hardware multipliers and MAC (multiplier/accumulator) units ever since Texas Instruments introduced the first commercially successful DSP (the TMS32010) in 1982.

Today, thanks to the relentless advance of Moore's Law, MAC units just aren't that large relative to other blocks placed on a chip. Configurable processor cores like Tensilica's Xtensa family have optional MAC units.

More units, fewer cycles

The high computational requirements of signal-processing algorithms spurred DSP designers to add parallel, independent execution units. Parallel execution units such as ALUs, shifters, and address-generation units allow a DSP to execute the inner loops of algorithms in fewer cycles.

Although many general-purpose processor cores don't have multiple, parallel execution units, it is possible with configurable processors. This trait is one of the advantages of the plastic configurable-processor architecture. In fact, if a fused instruction that performs an addition, a shift, and a next-address calculation will speed an inner loop, that instruction can easily be added to a configurable processor's instruction set and software-development tool chain.